Flying spot scanners (sometimes also referred to as "raster output scanners") conventionally have a reflective, multi-faceted polygon which is rotated about its central axis to repeatedly sweep one or more intensity modulated light beams across a photosensitive recording medium in a fast scan or "line scanning" direction while the recording medium is being advanced in an orthogonal slow scan or "process" direction, such that the beam or beams scan the recording medium in accordance with a raster scanning pattern. Digital printing is performed by serially intensity modulating each of the beams in accordance with a binary sample stream, whereby the recording medium is exposed to the image represented by the samples as it is being scanned.
As is known, the quality of the image printed by a digital printer depends to a substantial extent upon the precision with which the individual picture elements ("pixels") of the printed image are positioned on the recording medium. Spatially precise pixel positioning is especially important for printers which are supplied with a large number of data samples for each pixel to carry out half tone printing. Thus, quality digital printers typically include a scan buffer for temporarily storing the data samples, together with a bit clock for controlling the rate at which the samples are applied to the modulator.
It has been recognized that the frequency of the bit clock for a printer of the foregoing type can be adjusted to compensate for (1) variations in the rotational velocity of the polygon ("motor hunt errors"), (2) variations in the angular velocity at which the modulated light beam or beams are swept across the recording medium by the different facets of the polygon ("polygon signature error"), and (3) variations in the linear velocity at which the beam or beams are scanned across scan line segments that subtend different sectors of the scan angle ("scan non-linearity errors"). See, for example, the following commonly assigned U.S. Patents: U.S. No. 4,622,593 of D. N. Curry on "Polygon Signature Correction," U.S. No. 4,639,789 of D. N. Curry on "Raster Scanner Variable Frequency Clock Circuit," and U.S. No. 4,766,560 of D. N. Curry et al. on "Parallel/Pipelined Arithmetic Variable Clock Frequency Synthesizer." Those patents are hereby incorporated by reference, but U.S. No. 4,766,560 is singled out because the arithmetic frequency synthesizer disclosed therein is a favored variable frequency bit clock generator for carrying out the present invention.
As is known, polygon signature errors and scan non-linearity errors are calculable for a given printer and are essentially invariant as a function of time. In the interest of simplifying this disclosure, it will be assumed they can be ignored, although that generally implies that suitable provision has been made to adjust the bit clock frequency as required to compensate for them. Motor hunt errors are the principal topic of concern, so it is to be understood that polygon drive motors sometimes are operated open loop to avoid the additional cost and complexity of providing speed control servos for them. When an open loop drive motor is employed, the angular velocity of the polygon typically varies at low frequency as a function of time under the influence of several variables, such as the environmental conditions and the electromechanical transfer function of the polygon and its drive motor.
The known prior art demonstrates that the frequency of a bit clock can be adjusted to compensate for these motor hunt errors, either by adding pulses to or subtracting pulses from a crystal generated bit clock stream, as in U.S. No. 4,639,789, or by incrementally increasing or decreasing the value of a fixed length word that is recursively accumulated by an accumulator of an arithmetic frequency synthesizer, as in U.S. No. 4,766,560. Although these existing motor hunt compensation techniques are effective, they suffer from being relatively complex and costly to implement. In particular, the above described motor hunt compensation techniques have relied upon a microprocessor for retrieving an appropriate bit clock frequency correction value from a table look-up memory in response to a polygon angular velocity dependent count accumulated by a counter. It, therefore, will be understood that the cost and complexity of compensating for such polygon motor hunt errors could be significantly reduced by providing a low cost alternative to the microprocessor and table look-up memory.